With the significant reduction in package parasitics provided by the eGaN FET, the package inductance is minimized and is no longer the major parasitic loss contributor. The high frequency loop ...

This paper discusses the importance of low PDN (power-distribution network) impedance on high-speed PCBs, and the ways to achieve lower impedance at high frequencies. The study is conducted with ...

1. Synchronous buck converter with parasitic inductances. It has been previously demonstrated that the chip-scale packaging of high-voltage lateral eGaN FETs have extraordinarily small parasitic ...

S parameters play a dominant role in high speed PCB simulation and verification. Generation of S parameters is relatively easy at high frequency in comparison to other parameters like Y and Z. In this ...